(1) Field of the Invention
The present invention relates to a two-terminal circuit that is incorporated in a semiconductor integrated circuit device with a multilayer structure, a semiconductor integrated circuit that includes the two-terminal circuit, a method for changing design information that represents the two-terminal circuit, and a design aiding device that provides an aid in changing design information that represents the two-terminal circuit.
(2) Description of the Related Art
In response to recent demands for smaller, faster, and more power-saving semiconductor IC (integrated circuit) devices, semiconductor IC devices with a multilayer structure have been commercialized. A semiconductor IC device with a multilayer structure is constructed by laminating, on a semiconductor substrate, a plurality of layers of circuit elements including insulators, metal wiring lines, wells, contacts, poly silicon, etc.
A semiconductor IC device with a multilayer structure exhibits improved packaging density because a three-dimensional circuit is formed on a semiconductor substrate in the semiconductor IC device. The improved packaging density, together with the finer-line processes, contributes to achieving smaller, faster, and more power-saving features of the semiconductor IC device.
To form the layers of the circuit elements on the semiconductor substrate, a plurality of masks showing layout patterns corresponding to the layers are used. The layers of the circuit elements are formed one after another, by repeatedly processing the semiconductor substrate using a mask showing the corresponding layout pattern.
Some conventional semiconductor IC devices with a multilayer structure have switches for various purposes.
A conventional switch referred to herein intends to mean a part of a predetermined layer that is formed as being in the electrically connected state or in the electrically disconnected state. In accordance with a layout pattern corresponding to the predetermined layer, the part being in the electrically-connected state is formed by filling the part with a conductive material such as a metal wiring line and poly silicon, or the part being in the electrically-disconnected state is formed by leaving the part as an insulating part.
The state of such switches is set different for each prototype version of semiconductor IC devices or for each manufacturing lot of semiconductor IC devices. The following describes use examples of such switches.
(1) Semiconductor IC devices are each provided with a switch, and a circuit that delays a signal for which a timing adjustment is expected, by a time period in accordance with the state of the switch. When a semiconductor IC device of a certain prototype version is found to have a defective relating to a timing of such a signal, the state of a switch in a semiconductor IC device of a new version is changed to adjust the timing of the signal. By doing so, the defective can be eliminated in the semiconductor IC device of the new version.
(2) The state of switches is set different for each design version of semiconductor IC devices. By doing so, each semiconductor IC device is given an ID number for identifying its design version.
(3) An original layout pattern is designed so as to execute all or some of the functions in accordance with the state of switches included therein. By changing the state of the switches of the original layout pattern, a number of layout patterns that are based on the original layout pattern and that each differ in a range of executing the functions can be generated. By doing so, a variety of semiconductor IC devices with different additional features can be manufactured efficiently.
As described above, such conventional switches set different for each prototype version, each manufacturing lot, and the like, are integrated into semiconductor IC devices to achieve various purposes such as defective correction, version identification, and more efficient manufacturing.
Here, the following describes a conventional way to manufacture the above semiconductor IC device of the new version in which the state of the switch has been changed. First, a new layout pattern for the layer including the switch is drafted by a designer. A new mask is prepared according to the drafted layout pattern for the layer. A semiconductor substrate is then newly processed using the newly prepared mask for the layer including the switch and the previously used masks for the other layers.
The problem here is that the time and cost required for preparing masks are substantial because a method for optically correcting proximity effect and the like is employed to deal with the recent trend of finer lines. One solution for reducing the time and cost required for such remake of semiconductor IC devices, accordingly, is to reduce the number of masks to be newly prepared.
To manufacture the semiconductor IC device of the new version in which the state of the switch has been changed with the above conventional technique, however, preparation of the new mask for the layer including the switch cannot be avoided as described above. Here, suppose that another defective is found in a layer other than the layer including the switch. According to the above conventional technique, a new mask for that layer also needs to be prepared for the purpose of correcting the defective. In this case, two new masks in total need to be prepared. This situation may be a failure in reducing the time and cost for manufacturing semiconductor IC devices.
To solve the above problem, the present invention aims to provide a two-terminal circuit that is formed in a multilayer semiconductor IC device so as to extend over a plurality of layers thereof, and that makes it possible to manufacture a new two-terminal circuit that differs from the two-terminal circuit of the present invention in the state of a circuit part in one freely-chosen layer and accordingly in the signal transmission state being switched between the signal-transmittable state and the signal-untransmittable state. The two-terminal circuit of the present invention can therefore contribute to reducing the manufacturing time and cost. Further, the present invention aims to provide a semiconductor IC device including the above two-terminal circuit, a method for changing design information representing the above two-terminal circuit, and a design aiding device that provides an aid in changing design information representing the above two-terminal circuit.
(1) A two-terminal circuit of the present invention is formed in a multilayer semiconductor integrated circuit device so as to extend over a plurality of layers thereof, and is characterized by including a plurality of signal paths, each of which is laid at one or more of the plurality of layers to connect two terminals of the circuit, and includes a restricted part at each of the one or more layers, the restricted part being formed either in (a) a connected state for permitting transmission of a signal at the restricted part of the signal path or in (b) a disconnected state for preventing transmission of a signal at the restricted part of the signal path, wherein each of the plurality of layers includes at least different one of the plurality of signal paths that is laid thereat.
According to this construction, each of the layers includes at least one different signal path that is laid thereat. Therefore, by forming one restricted part of the one different signal path laid at each layer to be in the disconnected state and all the other restricted parts to be in the connected state, a first two-terminal circuit that is in the state incapable of transmitting a signal can be manufactured. Based on the first two-terminal circuit, a second two-terminal circuit in which restricted parts included in a freely-chosen layer are in the connected state and that is in the state capable of transmitting a signal can be manufactured.
The following is a case where a second semiconductor integrated circuit device including the second two-terminal circuit is to be manufactured based on a first semiconductor integrated circuit device including the first two-terminal circuit. Here, suppose that a mask for a specific layer needs to be newly prepared due to a defective found in the specific layer or the like. In this case, the state of restricted parts included in the specific layer may be changed, so that the second semiconductor integrated circuit device can be manufactured with a smaller number of masks to be newly prepared. As a result, the time and cost required for such remake of the semiconductor integrated circuit devices can be reduced.
Also, according to the above construction, even when such remake of the semiconductor integrated circuit devices is realized with a method that does not involve preparation of new masks, such as a processing method utilizing FIB (Focused Ion Beam), the number of layers to be processed can still be reduced. In this case too, therefore, the time and cost required for such remake of the semiconductor integrated circuit devices can be reduced.
(2) Also, in the two-terminal circuit described in the item (1), each signal path may be laid at and pass through all of the plurality of layers, to connect the two terminals.
According to this construction, each signal path in the two-terminal circuit includes one or more restricted parts included in each of the plurality of layers. Therefore, by providing a signal path whose restricted parts all are in the connected state, the first two-terminal circuit that is in the state capable of transmitting a signal can be manufactured. Based on the first two-terminal circuit, the second two-terminal circuit in which restricted parts included in one freely-chosen layer all are in the disconnected state and that is in the state incapable of transmitting a signal can be manufactured. As a result, the time and cost required for such remake of the circuits can be reduced.
(3) Also, in the two-terminal circuit described in the item (2), in each signal path, restricted parts in the plurality of layers may be formed in one of the following states where (a) restricted parts in all the layers are in the connected state, (b) a restricted part in one layer is in the disconnected state and restricted parts in layers other than the one layer are in the connected state, and (c) restricted parts in two layers are in the connected state and restricted parts in layers other than the two layers are in the connected state.
According to this construction, when a new two-terminal circuit that differs in the signal transmission state is repeatedly manufactured, the new two-terminal circuit is made to include a suitable one of a signal path in the state (b) and a signal path in the state (c). By doing so, a new two-terminal circuit can be manufactured repeatedly an unlimited number of times.
As a result of this, the time and cost required for such remake of a semiconductor integrated circuit device including the two-terminal circuit can be reduced over an unlimited number of times.
(4) Also, in the two-terminal circuit described in the item (2), each signal path may be sequentially laid at and pass through adjacent layers of the plurality of layers, to connect the two terminals.
According to this construction, the two-terminal circuit has the effect of reducing the time and cost required for such remake of semiconductor integrated circuit devices. Further, each contact can be formed to have a thickness corresponding to one layer. In this case, the total length of the contacts can be minimized, and so the signal delay time of the two-terminal circuit can be shortened accordingly.
(5) A signal selection circuit of the present invention includes: a plurality of input terminals; a plurality of two-terminal circuits, each of which is a two-terminal circuit described in the item (1), and is provided in correspondence with different one of the input terminals, a first terminal of each two-terminal circuit being electrically connected to the corresponding input terminal; and an output terminal that is electrically connected to a second terminal of each two-terminal circuit.
According to this construction, one of the two-terminal circuits can be formed in the state capable of transmitting a signal and the other two-terminal circuits can be formed in the state incapable of transmitting a signal. By doing so, based on the signal selection circuit of the present invention that selects a predetermined signal, a signal selection circuit that differs from the signal selection circuit of the present invention in the state in one freely-chosen layer and that selects a signal other than the predetermined signal can be manufactured. As a result, the time and cost required for such remake of the circuit can be reduced.
(6) A standard cell of the present invention is formed in a multilayer semiconductor integrated circuit device, including a two-terminal circuit described in the item (1).
According to this construction, based on the standard cell of the present invention, a standard cell that differs from the standard cell of the present invention in the state in one freely-chosen layer and that includes a two-terminal circuit whose signal transmission state differs from that of a two-terminal circuit included in the standard cell of the present invention can be manufactured. As a result, the time and cost required for such remake of the standard cell can be reduced.
(7) The standard cell described in the item (6) may include: a plurality of input terminals that are electrically connected to an outside of the standard cell; a plurality of two-terminal circuits, each of which is a two-terminal circuit described in the item (1), and is provided in correspondence with different one of the input terminals, a first terminal of each two-terminal circuit being electrically connected to the corresponding input terminal; and an output terminal that is electrically connected to a second terminal of each two-terminal circuit, and that is electrically connected to an outside of the standard cell.
According to this construction, one of the two-terminal circuits can be formed in the state capable of transmitting a signal and the other two-terminal circuits can be formed in the state incapable of transmitting a signal. By doing so, based on the standard cell of the present invention that selects a predetermined signal, a standard cell that differs from the standard cell of the present invention in the state in one freely-chosen layer and that selects a signal other than the predetermined signal can be manufactured. As a result, the time and cost required for such remake of the standard cell can be reduced.
(8) Also, a standard cell group of the present invention includes an input standard cell and an output standard cell, the input standard cell being a standard cell described in the item (6), including: a first input terminal that is electrically connected to an outside of the input standard cell; a first two-terminal circuit that is a two-terminal circuit described in the item (1), a first terminal thereof being electrically connected to the first input terminal; and a first relay output terminal that is electrically connected to a second terminal of the first two-terminal circuit, and the output standard cell being a standard cell described in the item (6), including: a second input terminal that is electrically connected to an outside of the output standard cell; a second two-terminal circuit that is a two-terminal circuit described in the item (1), a first terminal thereof being electrically connected to the second input terminal; a first relay input terminal; and an output terminal that is electrically connected to a second terminal of the second two-terminal circuit and to the first relay input terminal, and that is electrically connected to an outside of the output standard cell, wherein when the input standard cell and the output standard cell are placed at predetermined locations, the first relay output terminal and the first relay input terminal are electrically connected to each other.
According to this construction, the standard cell group of the present invention has the same effect as described in the item (7). Furthermore, a group of standard cells that can select a signal from the same number of input signals as that for the standard cell described in the item (7) can be realized, using standard cells of less variety than the standard cell described the item (7).
(9) The standard cell group described in the item (8) may further include a relay standard cell that is a standard cell described in the item (6), the relay standard cell including: a third input terminal that is electrically connected to an outside of the relay standard cell; a third two-terminal circuit that is a two-terminal circuit described in the item (1), a first terminal thereof being electrically connected to the third input terminal; a second relay input terminal; and a second relay output terminal that is electrically connected to a second terminal of the third two-terminal circuit and to the second relay input terminal, wherein when the input standard cell, the output standard cell, and the relay standard cell are placed at predetermined locations, the first relay output terminal and the second relay input terminal may be electrically connected to each other, and the second relay output terminal and the first relay input terminal may be electrically connected to each other.
According to this construction, the standard cell group of the present invention has the same effect as described in the item (8).
(10) The standard cell described in the item (6) may further include: one or both of a pull-down circuit and a pull-up circuit; and an output terminal that is electrically connected to a first terminal of the two-terminal circuit, and that is electrically connected to an outside of the standard cell, wherein either the first terminal of the two-terminal circuit maybe electrically connected to the pull-down circuit and a second terminal of the two-terminal circuit may be electrically connected to a power supply, or the first terminal of the two-terminal circuit may be electrically connected to the pull-up circuit and the second terminal of the two-terminal circuit may be electrically connected to a ground.
According to this construction, based on the standard cell of the present invention, a standard cell that differs from the standard cell of the present invention in the state in one freely-chosen layer and in an output signal level being switched can be manufactured. As a result, the time and cost required for such remake of the standard cell can be reduced.
(11) Also, the standard cell described in the item (6) may further include: one or both of a pull-down circuit and a pull-up circuit; a first input terminal that is electrically connected to an outside of the standard cell; a second input terminal that is electrically connected to an outside of the standard cell; a gate circuit that passes one of (a) a signal that has been inputted into the first input terminal and (b) a signal that has been inputted into the second input terminal, according to a signal obtained from a first terminal of the two-terminal circuit; and an output terminal that outputs the signal that has been passed from the gate circuit, to an outside of the standard cell, wherein either the first terminal of the two-terminal circuit may be electrically connected to the pull-down circuit and a second terminal of the two-terminal circuit may be electrically connected to a power supply, or the first terminal of the two-terminal circuit may be electrically connected to the pull-up circuit and the second terminal of the two-terminal circuit may be electrically connected to a ground.
According to this construction, the gate circuit can be generally formed in a smaller area than the two-terminal circuit. Therefore, the standard cell can be formed in a smaller area than the standard cell described in the item (7), and has the same effect as the standard cell described in the item (7).
(12) A variable delay circuit of the present invention includes: a signal delay circuit that delays an input signal to generate one or more delay signals each having a different delay time; and a signal selection circuit that is a signal selection circuit described in the item (5), and includes a plurality of input terminals into which a plurality of signals out of the input signal and the generated delay signals are inputted respectively.
According to this construction, based on the signal delay circuit of the present invention, a signal delay circuit that differs from the signal delay circuit of the present invention in the state in one freely-chosen layer and in a time period by which a signal is delayed can be manufactured. As a result, the time and cost required for such remake of the circuit can be reduced.
(13) A semiconductor integrated circuit device of the present invention can execute a plurality of functions, and includes: a two-terminal circuit that is a two-terminal circuit described in the item (1); and a restriction circuit that restricts at least one function identified by a state of the two-terminal circuit, out of the plurality of functions.
According to this construction, based on the semiconductor integrated circuit device of the present invention, a semiconductor integrated circuit device that differs from the semiconductor integrated circuit device of the present invention in the state in one freely-chosen layer and in a range of restricted functions can be manufactured. As a result, the time and cost required for such remake of the semiconductor integrated circuit device can be reduced.
(14) A semiconductor integrated circuit device of the present invention in which first information that needs to be concealed from a user is generated, includes: a two-terminal circuit that is a two-terminal circuit described in the item (1); an encryption circuit that encrypts the first information using key information identified by a state of the two-terminal circuit, to generate second information; and an output circuit that outputs the second information to an outside of the device.
According to this construction, based on the semiconductor integrated circuit device of the present invention, a semiconductor integrated circuit device that differs from the semiconductor integrated circuit device of the present invention in the state in one freely-chosen layer and in key information used for encryption can be manufactured. To be more specific, the semiconductor integrated circuit that has alternative key information for the purpose of maintaining reliability of encryption of the second information can be manufactured by a change in one freely-chosen layer. As a result, the time and cost required for such remake of the semiconductor integrated circuit device can be reduced.
(15) The semiconductor integrated circuit device described in the item (14) may further include a signal selection circuit that is a signal selection circuit described in the item (5) and that includes an input terminal in which the first information has been inputted and an input terminal in which the second information has been inputted, wherein the output circuit may output one of the first information and the second information that is outputted from the signal selection circuit, to an outside of the device.
According to this construction, based on the semiconductor integrated circuit that outputs the first information, a semiconductor integrated circuit that differs from the semiconductor integrated circuit that outputs the first information in the state in one freely-chosen layer and that outputs the second information can be manufactured, and vice versa. To be more specific, a semiconductor integrated circuit that outputs either of the first information or the second information can be manufactured in accordance with its use, by a change in one freely-chosen layer. As a result, the time and cost required for such remake of the semiconductor integrated circuit devices can be reduced.
(16) A design method of the present invention is for changing design information representing a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the design method including: an obtaining step of obtaining designation information that designates a target layer in which a change is to be made; and a connecting step of changing the design information indicating that one signal path includes a restricted part in the target layer to be in the disconnected state and restricted parts in layers other than the target layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state.
According to this construction, the design method can judge whether (a) the design information representing a two-terminal circuit can be changed to represent a two-terminal circuit that differs in the state of restricted parts in one designated layer and in the signal transmission state having been switched between the signal-transmittable state and the signal-untransmittable state, or (b) such a change in the design information is impossible.
Suppose that a correction of a defective found in a specific layer is also to be performed, when the signal transmission state of the two-terminal circuit is to be switched. In such a case, the signal transmission state of the circuit can be switched by designating the specific layer using the above design method, so that the number of layers to be changed can be reduced. This contributes to reducing the time and cost required for such remake of the circuit.
(17) A design method of the present invention is for changing design information representing a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the design method including: an obtaining step of obtaining designation information that designates a target layer in which a change is to be made; and a disconnecting step of changing the design information indicating that one signal path includes restricted parts in all the layers to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the design method of the present invention has the same effect as described in the item (16).
(18) A design method of the present invention is for changing design information representing a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the design method including: an obtaining step of obtaining designation information that designates a target layer in which a change is to be made; a connecting step of changing the design information indicating that one signal path includes a restricted part in the target layer to be in a disconnected state and restricted parts in layers other than the target layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state; and a preparing step of changing the design information indicating that one signal path includes a restricted part in a reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the design method of the present invention has the same effect as described in the item (16). Further, the design method of the present invention and the design method described in the item (20) can be alternately applied when the design method representing the two-terminal circuit is changed repeatedly to represent a new two-terminal circuit that differs in the state of restricted parts in one freely-chosen layer. In this case, the preparing step can be executed suitably, so that such repeated change of the design information can be performed an unlimited number of times.
By doing so, the time and cost required for such remake of a semiconductor integrated circuit represented by the design information can be reduced over an unlimited number of times.
(19) The design method described in the item (18) uses a state expression showing a change record of the design information, and may further include: a state expression updating step of updating the state expression by using a transformation rule in which a left part of an arrow matches the state expression, out of a transformation rule [i] xe2x80x9cT1+(Axxe2x88x92Bkx)xe2x86x92T1xe2x80x9d, and a transformation rule [ii] xe2x80x9cTxe2x86x92T+(Cxe2x88x92Ak)xe2x80x9d, where xe2x80x9ckxe2x80x9d is a layer number identifying the target layer, xe2x80x9cxxe2x80x9d is a layer number that is different from xe2x80x9ckxe2x80x9d, xe2x80x9cT1+(Axxe2x88x92Bkx)xe2x80x9d and xe2x80x9cTxe2x80x9d each are the state expression, xe2x80x9cT1xe2x80x9d is a partial expression included in the state expression, and xe2x80x9cAkxe2x80x9d, xe2x80x9cAxxe2x80x9d, xe2x80x9cBkxxe2x80x9d, and xe2x80x9cCxe2x80x9d each are a constant term included in the state expression, in such a manner that the state expression is changed to be a right part of the arrow in the used transformation rule; and a controlling step of (a) executing the preparing step by setting a layer identified by the layer number xe2x80x9cxxe2x80x9d as the reference layer when the state expression is updated by using the transformation rule [i], and (b) executing the connecting step when the state expression is updated by using the transformation rule [ii].
According to this construction, the design method of the present invention has the same effect as described in the item (18).
(20) A design method of the present invention is for changing design information representing a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the design method including: an obtaining step of obtaining designation information that designates a target layer in which a change is to be made; a disconnecting step of changing the design information indicating that one signal path includes restricted parts in all the layers to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state; and a first preparing step of changing the design information indicating that one signal path includes a restricted part in the target layer and a restricted part in a first reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the target layer and the first reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state; and a second preparing step of changing the design information indicating that one signal path includes a restricted part in a second reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the second reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the design method has the same effect as described in the item (16). Further, the design method of the present invention and the design method described in the item (18) can be alternately applied when the design method representing the two-terminal circuit is changed repeatedly to represent a new two-terminal circuit that differs in the state of restricted parts in one freely-chosen layer. In this case, the first preparing step and the second preparing step can be executed suitably, so that such repeated change of the design information can be performed an unlimited number of times.
By doing so, the time and cost required for such remake of a semiconductor integrated circuit represented by the design information can be reduced over an unlimited number of times.
(21) Also, the design method described in the item (20) uses a state expression showing a change record of the design information, and may further include: a state expression updating step of updating the state expression by using a transformation rule in which a left part of an arrow matches the state expression, out of a transformation rule [i] xe2x80x9cT1+(Axxe2x88x92Bmx)xe2x86x92T1xe2x80x9d, a transformation rule [ii] xe2x80x9cT2+(Cxe2x88x92Am) xe2x86x92T2xe2x80x9d, and a transformation rule [iii] xe2x80x9cT3+(Cxe2x88x92Ay)xe2x86x92T3+(Amxe2x88x92Bmy)xe2x80x9d, where xe2x80x9cmxe2x80x9d is a layer number identifying the target layer, xe2x80x9cxxe2x80x9d and xe2x80x9cyxe2x80x9d each are a layer number that is different from xe2x80x9cmxe2x80x9d, xe2x80x9cT1+(Axxe2x88x92Bmx)xe2x80x9d, xe2x80x9cT2+(Cxe2x88x92Am)xe2x80x9d, and xe2x80x9cT3+(Cxe2x88x92Ay)xe2x80x9d each are the state expression, xe2x80x9cT1xe2x80x9d, xe2x80x9cT2xe2x80x9d, and xe2x80x9cT3xe2x80x9d each are a partial expression included in the state expression, and xe2x80x9cAxxe2x80x9d, xe2x80x9cAmxe2x80x9d, xe2x80x9cAyxe2x80x9d, xe2x80x9cBmxxe2x80x9d, xe2x80x9cBmyxe2x80x9d, and xe2x80x9cCxe2x80x9d each are a constant term included in the state expression, in such a manner that the state expression is changed to be a right part of the arrow in the used transformation rule; and a controlling step of (a) executing the second preparing step by setting a layer identified by the layer number xe2x80x9cxxe2x80x9d as the second reference layer when the state expression is updated by using the transformation rule [i], (b) executing the disconnecting step when the state expression is updated by using the transformation rule [ii], and (c) executing the disconnecting step and the first preparing step by setting a layer identified by the layer number xe2x80x9cyxe2x80x9d as the first reference layer when the state expression is updated by using the transformation rule [iii].
According to this construction, the design method of the present invention has the same effect as described in the item (20).
(22) A design aiding device of the present invention provides an aid in changing design information representing a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, and includes: a design information storing unit for storing design information that indicates whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state; a state expression storing unit for storing a state expression showing a change record of the design information; a state expression updating unit for updating the state expression by using one of transformation rules described in the item (19); and a design information changing unit for changing the design information according to the one of the transformation rules that has been used to update the state expression.
According to this construction, the design aiding device of the present invention has the same effect as described in the item (19).
(23) A design aiding device of the present invention provides an aid in changing design information representing a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, and includes: a design information storing unit for storing design information that indicates whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state; a state expression storing unit for storing a state expression showing a change record of the design information; a state expression updating unit for updating the state expression by using one of transformation rules described in the item (21); and a design information changing unit for changing the design information according to the one of the transformation rules that has been used to update the state expression.
According to this construction, the design aiding device of the present invention has the same effect as described in the item (21).
(24) A design method of the present invention is for selecting an initial construction of a two-terminal circuit described in the item (2), the initial construction enabling a two-terminal circuit whose circuit state is switched between a signal-transmittable state and a signal-untransmittable state to be constructed repeatedly at least a predetermined number of times by changing a state of one or more restricted parts on a target layer each time, the design method including: an obtaining step of obtaining information that indicates the predetermined number of times xe2x80x9cNxe2x80x9d; a first calculating step of calculating a number of signal paths xe2x80x9cAxe2x80x9d that constitute a first candidate circuit that is represented by first design information to which a change operation according to the design method describe in the item (16) and a change operation according to the design method described in the item (17) can be alternately applied at least the number of times xe2x80x9cNxe2x80x9d; a second calculating step of calculating a number of signal paths xe2x80x9cBxe2x80x9d that constitute a second candidate circuit that is represented by second design information to which a change operation according to the design method described in the item (18) and a change operation according to the design method described in the item (20) can be alternately applied an unlimited number of times; and a selecting step of (a) selecting, as the initial construction, a construction of the first candidate circuit in a case where the number of signal paths xe2x80x9cAxe2x80x9d is smaller than the number of signal paths xe2x80x9cBxe2x80x9d, and (b) selecting, as the initial construction, a construction of the second candidate circuit in a case where the number of signal paths xe2x80x9cAxe2x80x9d is not smaller than the number of signal paths xe2x80x9cBxe2x80x9d.
According to this construction, the design method of the present invention enables a selection of the construction of a two-terminal circuit, in such a manner that a two-terminal circuit including the minimum number of signal paths can be selected.
(25) A design method of the present invention is for selecting, against a first standard cell including a two-terminal circuit described in the item (2) that is presently being selected, a second standard cell that differs from the first standard cell only in that a signal transmission state of a two-terminal circuit included therein is being switched, the design method using alternative information identifying an alternative standard cell that includes a two-terminal circuit whose signal transmission state differs from the signal transmission state of the two-terminal circuit included in the second standard cell by changing a state of restricted parts in a target layer of the two-terminal circuit, each of the plurality of layers being set as the target layer, the design method including: an obtaining step of obtaining designation information that designates the target layer; and a selecting step of selecting, as the second standard cell, the alternative standard cell identified by the alternative information for the designated target layer.
According to this construction, the design method can identify an alternative standard cell that is to be the second standard cell according to the first standard cell and the obtained target layer, by referring to alternative information that has been calculated in advance.
This can save a designer the operation for considering a state change of each restricted part in the first standard cell, as to the design change involving a selection of the second standard cell. Therefore, the design change can be performed more efficiently.
(26) A design aiding device of the present invention provides an aid in selecting, against a first standard cell including a two-terminal circuit described in the item (2) that is presently being selected, a second standard cell that differs from the first standard cell only in that a signal transmission state of a two-terminal circuit included therein is being switched, the design aiding device including: an alternative information storing unit for storing alternative information that identifies an alternative standard cell that includes a two-terminal circuit whose signal transmission state differs from the signal transmission state of the two-terminal circuit included in the second standard cell by changing a state of restricted parts in a target layer of the two-terminal, each of the plurality of layers being set as the target layer; an obtaining unit for obtaining designation information that designates the target layer; and a selecting unit for selecting, as the second standard cell, the alternative standard cell identified by the alternative information for the designated target layer.
According to this construction, the design aiding device can provide an aid in design that has the same effect as described in the item (25).
(27) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for changing design information representing a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the program making the computer execute the steps of: obtaining designation information that designates a target layer in which a change is to be made; and changing the design information indicating that one signal path includes a restricted part in the target layer to be in the disconnected state and restricted parts in layers other than the target layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (16).
(28) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for changing design information representing a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the program making the computer execute the steps of: obtaining designation information that designates a target layer in which a change is to be made; and changing the design information indicating that one signal path includes restricted parts in all the layers to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (17).
(29) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for changing design information representing a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the program making the computer execute the steps of: obtaining designation information that designates a target layer in which a change is to be made; changing the design information indicating that one signal path includes a restricted part in the target layer to be in the disconnected state and restricted parts in layers other than the target layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state; and changing the design information indicating that one signal path includes a restricted part in a reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (18).
(30) In the program described in the item (29), the design may be performed using a state expression showing a change record of the design information, and the program may further make the computer execute the steps of: updating the state expression by using a transformation rule in which a left part of an arrow matches the state expression, out of a transformation rule [i] xe2x80x9cT1+(Axxe2x88x92Bkx)xe2x86x92T1xe2x80x9d, and a transformation rule [ii] xe2x80x9cTxe2x86x92T+(Cxe2x88x92Ak)xe2x80x9d, where xe2x80x9ckxe2x80x9d is a layer number identifying the target layer, xe2x80x9cxxe2x80x9d is a layer number that is different from xe2x80x9ckxe2x80x9d, xe2x80x9cT1+(Axxe2x88x92Bkx)xe2x80x9d and xe2x80x9cTxe2x80x9d each are the state expression, xe2x80x9cT1xe2x80x9d is a partial expression included in the state expression, and xe2x80x9cAkxe2x80x9d, xe2x80x9cAxxe2x80x9d, xe2x80x9cBkxxe2x80x9d, and xe2x80x9cCxe2x80x9d each are a constant term included in the state expression, in such a manner that the state expression is changed to be a right part of the arrow in the used transformation rule; and (a) executing the preparing step by setting a layer identified by the layer number xe2x80x9cxxe2x80x9d as the reference layer when the state expression is updated by using the transformation rule [i], and (b) executing the connecting step when the state expression is updated by using the transformation rule [ii].
According to this construction, the program can provide an aid in design that has the same effect as described in the item (19).
(31) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for changing design information representing a two-terminal circuit described in the item (2) that is in a state capable of transmitting a signal, so as to represent a two-terminal circuit described in the item (2) that is in a state incapable of transmitting a signal, the design information indicating whether each restricted part of each signal path included in the two-terminal circuit is to be formed in the connected state or in the disconnected state, the program making the computer execute the steps of: obtaining designation information that designates a target layer in which a change is to be made; changing the design information indicating that one signal path includes restricted parts in all the layers to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state; and changing the design information indicating that one signal path includes a restricted part in the target layer and a restricted part in a first reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the target layer and the first reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the connected state; and changing the design information indicating that one signal path includes a restricted part in a second reference layer that is different from the target layer to be in the disconnected state and restricted parts in layers other than the second reference layer to be in the connected state, so as to indicate that the signal path includes the restricted part in the target layer to be in the disconnected state.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (20).
(32) In the program described in the item (31), the design may be performed using a state expression showing a change record of the design information, and the program may further make the computer execute the steps of: updating the state expression by using a transformation rule in which a left part of an arrow matches the state expression, out of a transformation rule [i] xe2x80x9cT1+(Axxe2x88x92Bmx)xe2x86x92T1xe2x80x9d, a transformation rule [ii] xe2x80x9cT2+(Cxe2x88x92Am)xe2x86x92T2xe2x80x9d, and a transformation rule [iii] xe2x80x9cT3+(Cxe2x88x92Ay)xe2x86x92T3+(Amxe2x88x92Bmy)xe2x80x9d, where xe2x80x9cmxe2x80x9d is a layer number identifying the target layer, xe2x80x9cxxe2x80x9d and xe2x80x9cyxe2x80x9d each are a layer number that is different from xe2x80x9cmxe2x80x9d, xe2x80x9cT1+(Axxe2x88x92Bmx)xe2x80x9d, xe2x80x9cT2+(Cxe2x88x92Am)xe2x80x9d, and xe2x80x9cT3+(Cxe2x88x92Ay)xe2x80x9d each are the state expression, xe2x80x9cT1xe2x80x9d, xe2x80x9cT2xe2x80x9d, and xe2x80x9cT3xe2x80x9d each are a partial expression included in the state expression, and xe2x80x9cAxxe2x80x9d, xe2x80x9cAmxe2x80x9d, xe2x80x9cAyxe2x80x9d, xe2x80x9cBmxxe2x80x9d, xe2x80x9cBmyxe2x80x9d, and xe2x80x9cCxe2x80x9d each are a constant term included in the state expression, in such a manner that the state expression is changed to be a right part of the arrow in the used transformation rule; and (a) executing the second preparing step by setting a layer identified by the layer number xe2x80x9cxxe2x80x9d as the second reference layer when the state expression is updated by using the transformation rule [i], (b) executing the disconnecting step when the state expression is updated by using the transformation rule [ii], and (c) executing the disconnecting step and the first preparing step by setting a layer identified by the layer number xe2x80x9cyxe2x80x9d as the first reference layer when the state expression is updated by using the transformation rule [iii].
According to this construction, the program can provide an aid in design that has the same effect as described in the item (21).
(33) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for selecting an initial construction of a two-terminal circuit described in the item (2), the initial construction enabling a two-terminal circuit whose circuit state is switched between a signal-transmittable state and a signal-untransmittable state to be constructed repeatedly at least a predetermined number of times by changing a state of one or more restricted parts in a target layer each time, the program making the computer execute the steps of: obtaining information that indicates the predetermined number of times xe2x80x9cNxe2x80x9d; calculating a number of signal paths xe2x80x9cAxe2x80x9d that constitute a first candidate circuit that is represented by first design information to which a change operation according to the design method described in the item (16) and a change operation according to the design method described in the item (17) can be alternately applied at least the number of times xe2x80x9cNxe2x80x9d; calculating a number of signal paths xe2x80x9cBxe2x80x9d that constitute a second candidate circuit that is represented by second design information to which a change operation according to the design method described in the item (18) and a change operation according to the design method described in the item (20) can be alternately applied an unlimited number of times; and (a) selecting, as the initial construction, a construction of the first candidate circuit in a case where the number of signal paths xe2x80x9cAxe2x80x9d is smaller than the number of signal paths xe2x80x9cBxe2x80x9d, and (b) selecting, as the initial construction, a construction of the second candidate circuit in a case where the number of signal paths xe2x80x9cAxe2x80x9d is not smaller than the number of signal paths xe2x80x9cBxe2x80x9d.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (24).
(34) A program of the present invention is a computer-executable program that is executed on a computer to provide an aid in design for selecting, against a first standard cell including a two-terminal circuit described in the item (2) that is presently being selected, a second standard cell that differs from the first standard cell only in that a signal transmission state of a two-terminal circuit included therein is being switched, the design method using alternative information identifying an alternative standard cell that includes a two-terminal circuit whose signal transmission state differs from the signal transmission state of the two-terminal circuit included in the second standard cell by changing a state of restricted parts in a target layer of the two-terminal circuit, each of the plurality of layers being set as the target layer, the program making the computer execute the steps of: obtaining designation information that designates the target layer; and selecting, as the second standard cell, the alternative standard cell identified by the alternative information for the designated target layer.
According to this construction, the program can provide an aid in design that has the same effect as described in the item (25).
(35) A program recording medium of the present invention is a computer-readable recording medium on which a program described in one of the items (27) to (34) is recorded.
According to this construction, the program recording medium stores a program that has the same effect as described in one of the items (27) to (34).